Yufei Li

and 7 more

The future electric grid is supported by a vast number of smart inverters interfacing with distributed energy resources at the edge. These inverters’ dynamics are typically characterized as impedances, which are crucial for ensuring grid stability and resiliency. However, the physical implementation of these inverters may change significantly from inverters to inverters and may be kept confidential. Existing analytical impedance models require a complete and precise understanding of system parameters. They can hardly capture the complete electrical behaviors when the inverters are performing complex functions. Online impedance measurements for many inverters across multiple operating points are not scalable. To address these issues, we present InvNet, a machine learning framework to systematically evaluate the effectiveness of data-driven methods for modeling inverter impedance patterns across a wide operation range, even with limited impedance data. Leveraging transfer learning, the InvNet can extrapolate from physics-based models to real-world ones and from one inverter to another with very limited data. This framework demonstrates machine  learning as a powerful tool for modeling and analyzing black-box characteristics of grid-tied inverter systems that cannot be accurately described by traditional analytical methods, such as inverters under model predictive control. Comprehensive evaluations were conducted to verify the effectiveness of the InvNet in various scenarios. All data and models were open-sourced.

Ping Wang

and 5 more

This paper presents a multistack switched-capacitor point-of-load (MSC-PoL) voltage regulation module (VRM) with coupled magnetics for ultrahigh-current chiplet systems. In the MSC-PoL architecture, the stacked switched-capacitor cells split the high input voltage into several intermediate voltage rails, which are loaded with the switched-inductor cells to achieve soft charging and voltage regulation. Automatic capacitor voltage balancing and inductor current sharing are realized during the soft charging process. Many inductors of the switched-inductor cells are coupled into one and operated in interleaving to reduce the inductor current ripple and boost the transient speed. A 48-to-1-V/450-A VRM containing two MSC-PoL modules is built and tested, leveraging high voltage GaN devices for the front-end and high current Silicon devices for the back-end. Two ladder-structured coupled inductor designs are developed and compared, one of which installs a leakage magnetic plate to adjust the leakage inductance for lower current ripple. Featuring 3D stacked packaging, the entire power stage, gate drivers, and bootstrap circuits of one MSC-PoL module are enclosed into a 1/16-brick/0.31-in3/6-mm-thick package. The peak and the full-load efficiencies as well as the full-load power density (including both gate loss and size) of the MSC-PoL prototype with and without using the leakage plate are 91.7% and 89.5%, 85.8% and 85.6%, and 621 W/in3 and 724 W/in3, respectively. The 6-mm-thick MSC-PoL converter can be embedded into the chiplet or CPU socket, enabling power-supply-in-package (PwrSiP) for extreme efficiency, density, and control bandwidth.