It is well known that CMOS Cross-coupled Differential Drive (CCDD) is the commonly used approach in the design of RF-DC converters. However, multistage designs are usually used to produce higher DC output voltage. This in turn will lead to using the twin-well CMOS process for fabrication since the NMOS source will be at higher potential in the next and consequent stages. The twin-well process technology is expensive compared to the n-well process. On the other hand, the DC output of these designs will saturate when higher voltage is required using multistage. This brief presents a new CMOS n-well process RF-DC converter. The design is hybrid in which the first stage is designed using CCDD since the NMOS source is grounded and the second and consequent stages are designed using only PMOS transistors. The functionality of the proposed design is confirmed using CADENCE in 0.18µm TSMC CMOS technology. Simulation results show that the design is working properly and achieves linear DC output voltage with the number of stages and an input power range of 33dB for PCE >20%.